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NUP8100D Product Preview Low Capacitance Transient Voltage Suppressor Array
This integrated transient voltage suppressor device (TVS) is designed for applications requiring transient overvoltage protection. It is intended for use in sensitive equipment such as computers, printers, business machines, communication systems, medical equipment, and other applications. Its integrated design provides very effective and reliable protection for eight separate lines using only one package. These devices are ideal for situations where board space is at a premium.
Features http://onsemi.com
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16 15 14 13 12 11 10 9
* Low Capacitance * Protection for the following IEC Standards:
* * *
IEC61000-4-2 (ESD) 15 kV (air) 8 kV (contact) IEC61000-4-4 (EFT) 40 A (5 / 50 ns) EC61000-4-5 (lightning) 12 A (8 / 20 ms) Bidirectional Configuration Moisture Sensitivity Level 1 This is a Pb-Free Device*
Benefits
* Provides Protection for ESD Industry Standards: IEC 61000, HBM * Protects the Line Against Transient Voltage Conditions in Either * * * * * *
Direction Minimize Power Consumption of the System Minimize PCB Board Space
MARKING DIAGRAM
16 16 1 1 NUP8100D AWLYWWG
SOIC-16 D SUFFIX CASE 751B
Applications
Wireless Communication Circuits RS-422, RS-432, and RS-485 Low Voltage ASICs Ethernet - 10/100 BaseT
NUP8100D = Specific Device Code A = Assembly Location WL = Wafer Lot Y = Year WW = Work Week G = Pb-Free Package
ORDERING INFORMATION
Device NUP8100DT1G Package SOIC-16 (Pb-Free) Shipping 2500 / Tape & Reel
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
This document contains information on a product under development. ON Semiconductor reserves the right to change or discontinue this product without notice.
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
(c) Semiconductor Components Industries, LLC, 2006
September, 2006 - Rev. P1
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Publication Order Number: NUP8100D/D
NUP8100D
MAXIMUM RATINGS
Parameter ESD Discharge IEC61000-4-2 Air Discharge Contact Discharge Symbol VPP Value 15 8.0 300 -40 to 85 -55 to 150 260 Unit kV
Peak Power Dissipation (8 x 20 mS @ TA = 25C) Operating Temperature Range Storage Temperature Range Maximum Lead Temperature for Soldering Purposes (1.8 in from case for 10 seconds)
Ppk (Note 1) TOP TSTG TL
W C C C
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. Nonrepetitive current per Figure 1.
ELECTRICAL CHARACTERISTICS (TJ = 25C unless otherwise noted)
Parameter Maximum Reverse Working Voltage Breakdown Voltage Leakage Current Clamping Voltage Capacitance Symbol VRWM VBR IR Vc Cline IR = 1.0 mA VRWM = 5.0 V IPP = 12 A f = 1 MHz, VR = 0 V 6.0 20 26 15 Test Conditions Min Typ Max 5.0 Unit V V mA V pF
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NUP8100D
TYPICAL PERFORMANCE CURVES (TA= 25C unless otherwise specified)
100 % OF PEAK PULSE CURRENT 90 80 70 60 50 40 30 20 10 0 0 20 40 t, TIME (ms) 60 80 tP tr PEAK VALUE IRSM @ 8 ms PULSE WIDTH (tP) IS DEFINED AS THAT POINT WHERE THE PEAK CURRENT DECAY = 8 ms HALF VALUE IRSM/2 @ 20 ms
Figure 1. 8 x 20 ms Pulse Waveform
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NUP8100D
PACKAGE DIMENSIONS
SOIC-16 CASE 751B ISSUE J
-A-
16 9 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. DIM A B C D F G J K M P R MILLIMETERS MIN MAX 9.80 10.00 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.386 0.393 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.229 0.244 0.010 0.019
-B-
1 8
P
8 PL
0.25 (0.010)
M
B
S
G F
K C -T-
SEATING PLANE
R
X 45 _
M D
16 PL M
J
0.25 (0.010)
TB
S
A
S
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81-3-5773-3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative
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NUP8100D/D

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